1. Field of the Invention
The present invention relates to a charge pump circuit, and more particularly, to a charge pump circuit for generating a boosted voltage that is higher than a low internal voltage.
2. Description of the Related Art
With the rapid development of micromachining technology, a power supply voltage is being continuously decreased to reduce power consumption. In order to meet demand for high-speed systems capable of high-speed digital communication, high-quality/high-speed display, and high-capacity storage, an analog block and a digital block within a system use a plurality of power supply voltages.
However, since some semiconductor devices or some circuits thereof require a high voltage, depending on their operation characteristics, the need exists for a charge pump circuit or a voltage boosting circuit for generating a higher voltage than a power supply voltage within a semiconductor device.
The charge pump circuit can obtain a high voltage by performing a boosting operation based on the law of conservation of electric charge after charging a voltage in an initialization state and transferring the charged voltage to an output stage. The charge pump circuit is divided into two types, which include an N-type Metal-Oxide-Semiconductor (NMOS) voltage-doubler type for sequentially performing initialization, boosting, and transfer operations using NMOS transistors as charge transfer transistors and a cross-couple type for boosting one of two inputs having opposite phases, automatically initializing the other input, and transferring a boosted input voltage using an initialized low level of the other input.
There is a large difference between the two types. That is, the NMOS voltage-doubler type charge pump circuit additionally boosts a gate voltage using the NMOS transfer transistor in order to smoothly transfer the electric charge of an input stage to the output stage, whereas the cross-coupled charge pump circuit uses a P-type Metal-Oxide-Semiconductor (PMOS) transfer transistor, performs a control operation using another input stage in order to improve the transfer efficiency per area and obtain a high output voltage, and constantly maintains a bulk voltage of the PMOS transistor at a maximum level.
FIG. 1 is a circuit diagram of a conventional NMOS voltage-doubler type charge pump circuit. The charge pump circuit includes an inverter IN, an initialization transistor N_in, an initialization control transistor N_inc, a transfer transistor N_tr, a transfer control transistor N_trc, an initialization control capacitor Cb1, a transfer control capacitor Cb2, a pump capacitor Cp, and an output capacitor Co. The initialization transistor N_in, the initialization control transistor N_inc, the transfer transistor N_tr, and the transfer control transistor N_trc are all NMOS transistors.
Operation of the conventional NMOS voltage-doubler charge pump circuit will be described with reference to FIG. 1.
First, the initialization control capacitor Cb1 and the initialization control transistor N_inc function to initialize the pump capacitor Cp at as high a voltage as possible upon initialization. The transfer control capacitor Cb2 and the transfer control transistor N_trc function to transfer as much electric charge as possible from the pump capacitor Cp to an output terminal when a transfer operation is performed.
When a positive input voltage VIN having a low level is initially applied to an input terminal, a phase is inverted to a high level through the inverter IN and the voltage of the initialization control capacitor Cb1 is raised. Since the initialization transistor N_in is turned on by raising the voltage of the gate terminal thereof, one side of the pump capacitor Cp is grounded by VIN and an internal voltage VINT is transferred to the other side of the pump capacitor Cp, such that the initialization operation is performed.
When a level of the internal voltage VINT applied to the gate terminal of the initialization control transistor N_inc is lower than a difference between a gate voltage and a threshold voltage, the initialization control transistor N_inc is turned off. When an inverted level of the positive input voltage VIN applied to the gate terminal of the transfer control transistor N_trc is higher than the difference between the gate voltage and the threshold voltage, the transfer control transistor N_trc is turned on.
When the initialized internal voltage VINT at the other side of the pump capacitor Cp is applied to the gate terminal of the transfer transistor N_tr through the transfer control transistor N_trc, the transfer transistor N_tr is turned off.
When the input voltage is increased after the initialization operation, the level at the one side of the pump capacitor Cp is raised from the ground voltage by the increased voltage. According to the law of conservation of electric charge, the level at the other side of the pump capacitor Cp is also raised from the initialized internal voltage VINT by the increased voltage, such that a boosted voltage VPP is generated by the pumping operation.
Since the boosted voltage applied to the gate terminal of the initialization control transistor N_inc is higher than the difference between the gate voltage and the threshold voltage, the initialization control transistor N_inc is turned on and the initialization transistor N_in is turned off by applying the internal voltage VINT to its gate terminal.
In contrast, when the increased input voltage VIN is applied to the gate terminal of the transfer transistor N_tr, the transfer transistor N_tr is turned on. The boosted voltage is transferred to the output terminal and is charged in the output capacitor Co.
However, in the conventional NMOS voltage-doubler type charge pump circuit, a maximum value of an output voltage capable of being generated by an NMOS gate voltage becomes the difference (Vg−Vth) between the gate voltage and the threshold voltage. Since an NMOS bias voltage is low, the charge pump circuit approaches a cut-off region where no current flows and current supply capability thereof is degraded.
In general, the charge pump circuit may use a multi-stage charge pump structure to easily control the internal voltage and the timing at which a target boosted-voltage is output. When an initialization time and a boosting and transfer time overlap in the same stage of the conventional NMOS voltage-doubler type charge pump circuit, unwanted electrical discharge occurs and efficiency rapidly deteriorates. Since the associated times are conventionally controlled using a delay unit, a precise control operation should be performed in consideration of voltage variation. However, it becomes difficult to control the timing when the number of stages increases.
FIG. 2 is a circuit diagram of a conventional cross-coupled charge pump circuit. The charge pump circuit includes first and second initialization transistors N_in1 and N_in2, first and second transfer transistors P_tr1 and P_tr2, first and second boost capacitors Cb1 and Cb2, and an output capacitor Co. The first and second initialization transistors N_in1 and N_in2 are NMOS transistors, and the first and second transfer transistors P_tr1 and P_tr2 are PMOS transistors.
Operation of the conventional cross-coupled charge pump circuit will be described with reference to FIG. 2.
When a positive input voltage VIN having a low level is initially applied to a first input terminal, one side of the first boost capacitor Cb1 is grounded and, simultaneously, the second transfer transistor P_tr2 is turned on. When a negative input voltage VINB having a high level is applied to a second input terminal, one side of the second boost capacitor Cb2 is at a high voltage and, simultaneously, the first initialization transistor N_in1 serving as the NMOS transistor is turned on when the voltage is applied to its gate terminal. An internal voltage VINT is transferred to the other side of the first boost capacitor Cb1 so that the first input terminal side is initialized.
At this time, since the negative input voltage VINB having a high level is applied to the gate terminal of the first transfer transistor P_tr1, the first transfer transistor P_tr1 is turned off.
When the first initialization transistor N_in1 is turned off after initialization of the first input terminal side, and the positive input voltage VIN is increased, the voltage at the one side of the first boost capacitor Cb1 is raised from the ground voltage by the increased voltage. According to the law of conservation of electric charge, the voltage at the other side of the first boost capacitor Cb1 is also raised from the initialized internal voltage VINT by the increased voltage, such that a boosted voltage is generated by the pumping operation.
When the negative input voltage VINB is decreased to a relatively low level and is applied to the gate terminal of the first transfer transistor P_tr1, the first transfer transistor P_tr1 is turned on and the pumped boosted voltage is transferred to the output terminal and charged in the output capacitor Co.
In contrast, when the positive input voltage VIN is increased, the negative input voltage VINB is decreased to a relatively low level. The first transfer transistor P_tr1 is turned on simultaneously when one side of the second boost capacitor Cb2 is grounded. When the input voltage having the high level is applied to the gate terminal of the second initialization transistor N_in2, the second initialization transistor N_in2 serving as the NMOS transistor is turned on and the internal voltage VINT is transferred to the other side of the second boost capacitor Cb2, such that the second input terminal side is initialized.
However, when the conventional cross-coupled charge pump circuit boosts one of the two input voltages having opposite phases, the other voltage is automatically initialized. Since the charge pump circuit has a structure for transferring the electric charge of the boosted voltage with another initialized voltage, waveforms of the two input voltages cross over and a shoot-through current is generated in an interval of the same phase. When the waveforms of the two input voltages overlap in the same phase, the electric charge of the output terminal flows backward to an internal power supply terminal, such that efficiency may be significantly lowered by a leakage current.
For example, if a time when the positive input voltage VIN transitions from the high level to the low level overlaps a time when the negative input voltage VINB transitions from the low level to the high level, the second initialization transistor N_in2 at the negative input voltage VINB side is turned on, such that the electric charge stored in the second boost capacitor Cb2 at the second input terminal side is not transferred to the output terminal and flows into the internal power supply terminal.
When the positive input voltage VIN does not transition to the high level due to a signal delay and the negative input voltage VINB transitions to the low level, voltages of first and second boost nodes NO1 and NO2 are partially decreased by the effect of bulk forward-bias. Accordingly, the first and second transfer transistors P_tr1 and P_tr2 are weakly turned on. The electric charge stored in the output capacitor Co partially flows backward to the first and second boost nodes NO1 and NO2.
Therefore, a voltage charged in the output capacitor Co is charged in the first and second boost capacitors Cb1 and Cb2. Since the voltage has a high level, the first and second initialization transistors N_in1 and N_in2 are turned on. In this case, since a leakage current is generated, the voltage of the output terminal is not maintained at a pumped boosted voltage.
In contrast, since the conventional cross-coupled charge pump circuit uses two inputs having opposite phases, transistor characteristics are irregularly degraded due to a high electric field.
That is, when the output voltage VOUT reaches a target voltage, a charge pumping operation is stopped and an increase of the output voltage VOUT is stopped. Since the positive input voltage VIN and the negative input voltage VINB conventionally have opposite phases, the charge pumping operation at one input terminal is stopped and the other input terminal is maintained at the high level. Also in a standby state in which the internal power supply voltage is applied but a semiconductor circuit itself does not operate, one input terminal of the positive input voltage VIN and the negative input voltage VINB should be maintained at the high level.
Specifically, since a direct current (DC) generator selectively operates only in a required interval, this state may continue for a long time. Since a transistor to which the high electric field is applied is fixed and the degradation effect is focused on the transistor, mismatch may be caused by degradation in a circuit, like the cross-coupled charge pump circuit, in which matching between both input terminals is important. Consequently, the performance of the charge pump circuit may be degraded.